Corcos has discussed plans for DOGE to build “one new API to rule them all,” making IRS data more easily accessible for cloud platforms, sources say.

this is gonna be great! 🤦‍♂️

edit: our tax information is now, or soon will be, in the hands of anyone with a large enough crypto wallet or some spare time.

bravo!

still hopeful that, if trumps idiocy does not directly blow us all to hell, an economic downturn may give us another COVID style environmental breather. silver linings and all that.

elbows up, my friend. elbows up!

old info? have things flipped?

we seem to like it dirty.

[…]our refineries were designed to process oil coming from Mexico and Venezuela. “And a lot of that tends to be relatively heavy and relatively high in sulfur,”

oh, absolutely agreed. my “as simple as that” comment was to emphasize that he is a simple creature.

efficient!

based on proven reserves it looks like venezuela is gonna get canada’d harder than usual.

good observation. wonder how texas and louisiana “drill baby drillers” are doin’ right now…

just collateral damage when trumps ego is in the mix.

we have been told for some time now that management of trump is best done by stroking that ego. I am now convinced that it really is as simple as that. if it aligns with his compulsions, stroke away and you have your stooge.

unique snowflake here.

(really good article)

it was almost painful to watch the shuffle, shuffle, shuffle, shuffle

ok. my apologizes.

there really are tons of things to consider with that question. RISC has historically allowed for faster clocking and fewer cycles per instruction, so thats a win. RISC also requires more instructions per useful operation and also blows up the binary size, so… :-(

all things being equal (hahaha) RISC has more headroom and legroom for future improvements that dont complecate the silicon to extreme degrees. the vast majority of CISC designs are now pretty RISC-like at their cores, but the software interface remains CISC and, I think, complicates and limits variety and advancement.

imho, a properly spec’d RISC processor and a carefully designed compiler, cycle for cycle, macro for macro and watt for watt outperforms a CISC design (even with a RISC-like core). major computing holy wars are been waged over this for decades.

all I currently have access to are older studies that show mixed general purpose results on RISC vs CISC (performance, not power efficiency), but if I had to make a choice about what my future ideal processor would be, it would be RISC core and RISC instruction set architecture simply due to less complexity, more efficient use of wafer space and lower power requirements. then we start talking about massively parallel RISC in tiny spaces and, for many (but not all) workloads, thats a big win.

yes. and the emotional scarring was permanent.

great movie.

soooo close to consciousness… so! damn! close!

and then… Zzzzzzzz.

and, kids… this is what happens with you mix and match your stash with your friends.

this is so deliciously and disappointingly true. :-/

CPI per CPI… RISC, but thats a trap of a question and you know it ;-)

tons of variables in that question, but there should be more headroom in RISC designs and thats why, internally, most things are RISC-y.

meh (not dismissive - just cute), ecosystem mootness is overrated. at the heart of every CISC beats a RISC. strip away the mask and lets poke the nuclear core.